Any architecture is characterized by its data path and its control path. Let us first focus in understanding the ARM Data Path and later understand ARM instruction set with reference to this core data path.
Since ARM is based on RISC Architecture, all data manipulations happen only between the registers data and nothing from direct memory location.
Hence, it is necessary to load all operands in the register files.
Instructions typically use 2 source registers and single result or destination registers.
ARM introduces a Barrel Shifter along the data path, which can pre-process the data before it enters into the ALU (Arithmetic and Logical Unit).
Barrel shifter is a combinational logic circuit, which can shift data bits to the left or to the right by arbitrary number of positions in the same cycle itself. This is in contrary to a classical shift register involving flip-flops, which requires same number of clock cycles as that of the number of shift operations involved.
Other interesting feature is the Increment and Decrement Logic which can operate on the register content, independent of the ALU. This can be very useful for block data move operations.
Notice that ALU, Barrel Shifter and the Address Incrementer are all combinational logic circuits and all work independently of each other (i.e. Barrel Shifter and Address Incrementer can work independent of the ALU)
Note that all registers are 32 bit wide, since both address and data operates at 32 bit width.
NEXT: ARM REGISTERS
0 comments:
Post a Comment