TUTORIALS: ARM ARCHITECTURE

ARM Architecture is based upon RISC architecture. But, it must be noted that it is not a pure RISC architecture but has been enhanced to meet certain requirements of an embedded application.


Some of these requirements included High Code Density, Smaller Memory Foot-prints and Low Power consumptions.

But ARM still satisfies the RISC architecture conditions in the following way:

• Follows a load store architecture, where in data processing operations are performed only on the register contents.
• Has a uniform & large pool of registers
• Uniform & fixed length of instructions, 32 bit wide
• 32-bit Processor (With some variants -> Which can execute 16 bit instructions too!)
  
• High Code Density
• Good Speed/Power consumption ratio

So, how does the ARM deviate from the RISC Architecture?
In the ways as defined in the following ARM add-on features

ARM Enhancements To Basic RISC Architecture

• Barrel shifter which can enhance the available on-chip hardware usability
• Auto Increment and Auto Decrement addressing modes to optimize the program loops
• Provides instructions that can perform load and store of multiple data elements
• Conditional execution of instructions to maximize throughput